1 | Á¦¸ñ(Title) | A System Level Network-on-chip Model with MLDesigner | |
---|---|---|---|
ÀúÀÚ(Author) | Ankur Agarwal Rabi Shankar A. S. Pandya Young-Uhg Lho | ||
¼ö·ÏÀú³Î(Journal) | JICCE(Journal of information and communication convergence engineering) | ||
¿ø¹®¼ö·Ïó(Citation) | VOL 06 NO. 02 PP. 0122 ~ 0128 2008. 06 |
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